Beam-induced seeded lateral epitaxy with suppressed impurity diffusion for a three-dimensional DRAM cell fabrication

A simple method for suppressing lateral diffusion of impurities during liquid-phase seeded lateral epitaxy is demonstrated. An undoped epitaxial Si layer selectively grown on the seeding region is used as a diffusion stopper. The source-to-drain electrical short observed in the MOSFETs fabricated in the vicinity of the doped seeding region is reduced by adopting the method. The method is also successfully applied to the fabrication of a three-dimensional DRAM cell stacked switching transistor in SOI, of (SSS) that includes a heavily doped seeding region in its structure. The cells are found to operate normally, in spite of the heavily doped region, owing to the diffusion suppression effect