Subquarter-micrometer gate-length p-channel and n-channel MOSFETs with extremely shallow source-drain junctions

Author

Miyake, Masayasu ; Kobayashi, Toshio ; Okazaki, Yukio

Author_Institution

NTT Corp., Kanagawa, Japan

Volume

36

Issue

2

fYear

1989

fDate

2/1/1989 12:00:00 AM

Firstpage

392

Lastpage

398

Abstract

The fabrication of p-channel and n-channel MOSFETs with sub-quarter-micrometer n⁺ polysilicon gates, have been fabricated using extremely shallow source-drain (S-D) junctions, is reported p⁺-n junctions as shallow as 80 nm have been fabricated using preamorphization low-energy BF₂ ion implantation and rapid thermal annealing, and 80-nm n⁺-p junctions have been fabricated using low-energy arsenic ion implantation and rapid thermal annealing. n-channel MOSFETs with 80-mm S-D junctions and 0.16-μm gate lengths have been fabricated, and a maximum transconductance of 400 mS/mm has been obtained. 51-stage n-channel enhancement-mode/enhancement-mode (E/E) ring oscillators and p-channel E/E ring oscillators with extremely shallow S-D junctions have also been obtained

Keywords

CMOS integrated circuits; VLSI; insulated gate field effect transistors; integrated circuit technology; semiconductor technology; 160 nm; 400 mS/mm; 80 nm; As ion implantation; BF₂ ion implantation; E/E ring oscillators; MOSFETs; RTA; fabrication; n-channel MOSFETs; p-channel MOSFETs; p⁺-n junctions; polycrystalline Si gates; polysilicon gates; rapid thermal annealing; shallow source-drain junctions; sub-quarter-micrometer; transconductance; Boron; Counting circuits; Fabrication; Ion implantation; MOSFETs; Rapid thermal annealing; Silicon; Tail; Threshold voltage; Transconductance;

fLanguage

English

Journal_Title

Electron Devices, IEEE Transactions on

Publisher

ieee

ISSN

0018-9383

Type

jour

DOI

10.1109/16.19941

Filename

19941