A 5.7-GHz 0.18-μm CMOS gain-controlled differential LNA with current reuse for WLAN receiver

Author

Che-Hong Liao ; Huey-Ru Chuang

Author_Institution

Dept. of Electr. Eng., Nat. Cheng Kung Univ., Tainan, Taiwan

Volume

13

Issue

12

fYear

2003

Firstpage

526

Lastpage

528

Abstract

This letter presents a 5.7 GHz 0.18 μm CMOS gain-controlled differential LNA for an IEEE 802.11a WLAN application. The differential LNA, fabricated with the 0.18 μm 1P6M standard CMOS process, uses a current-reuse technology to increase linear gain and save power consumption. The circuit measurement is performed using an FR-4 PCB test fixture. The LNA exhibits a noise figure of 3.7 dB, linear gain of 12.5 dB, P/sub 1dB/ of -11 dBm, and gain tuning range of 6.9 dB. The power consumption is 14.4 mW at V_DD=1.8 V.

Keywords

CMOS analogue integrated circuits; MMIC amplifiers; differential amplifiers; field effect MMIC; integrated circuit noise; microwave receivers; wireless LAN; 5.7 GHz; CMOS gain-controlled differential LNA; IEEE 802.11a WLAN; WLAN receiver; current-reuse technology; gain tuning range; linear gain; noise figure; power consumption; virtual ground; CMOS process; CMOS technology; Circuit optimization; Circuit testing; Energy consumption; Fixtures; Gain; Noise figure; Performance evaluation; Wireless LAN;

fLanguage

English

Journal_Title

Microwave and Wireless Components Letters, IEEE

Publisher

ieee

ISSN

1531-1309

Type

jour

DOI

10.1109/LMWC.2003.819379

Filename

1261772