Abstract :
With today´s rapidly shrinking process geometries, designers must address crosstalk, electromigration, IR drop, and other effects earlier in the design cycle to achieve signal integrity. We present a new placement algorithm that minimizes crosstalk and increases design speed 8% on average, in comparison with a traditional timing-driven, congestion-aware placement flow.
Keywords :
circuit optimisation; crosstalk; electromigration; integrated circuit design; IR drop; congestion-aware placement flow; crosstalk; design speed; electromigration; signal integrity; Algorithm design and analysis; Capacitance; Crosstalk; Grid computing; Libraries; Manufacturing processes; Physics computing; Probability; Routing; Signal design;
