• DocumentCode
    868162
  • Title

    Parallel parsing of arithmetic expressions

  • Author

    Srikant, Y.N.

  • Author_Institution
    Dept. of Comput. Sci. & Autom., Indian Inst. of Sci., Bangalore, India
  • Volume
    39
  • Issue
    1
  • fYear
    1990
  • fDate
    1/1/1990 12:00:00 AM
  • Firstpage
    130
  • Lastpage
    132
  • Abstract
    Parallel algorithms for parsing expressions on mesh, shuffle, cube, and cube-connected cycle parallel computers are presented. With n processors, it requires O(√n) time on the mesh-connected model and O(log2 n) time on others. For the mesh-connected computer, the author uses a wrap-around row-major ordering. For the shuffle computer, he uses an extra connection between adjacent processors, and thus four connections per processor are required
  • Keywords
    grammars; parallel algorithms; arithmetic expressions; cube; cube-connected cycle parallel computers; mesh; mesh-connected model; parallel algorithms; parsing; shuffle; shuffle computer; wrap-around row-major ordering; Algorithm design and analysis; Computational modeling; Computer architecture; Computer simulation; Delay effects; Digital arithmetic;
  • fLanguage
    English
  • Journal_Title
    Computers, IEEE Transactions on
  • Publisher
    ieee
  • ISSN
    0018-9340
  • Type

    jour

  • DOI
    10.1109/12.46288
  • Filename
    46288
    • Link To Document
    https://search.isc.ac/dl/search/defaultta.aspx?DTC=49&DC=868162