A computer-aided design framework for superconductor circuits

Author

Khalaf, M. ; Whiteley, S. ; Van Duzer, T.

Author_Institution

Dept. of Electr. Eng. & Comput. Sci., California Univ., Berkeley, CA, USA

Volume

5

Issue

2

fYear

1995

fDate

6/1/1995 12:00:00 AM

Firstpage

3341

Lastpage

3344

Abstract

This report describes a Computer-Aided Design (CAD) framework for superconducting digital circuits that will automatically transform a high-level combinational circuit description to a gate-level netlist. The framework involves enhancing the current semiconductor logic synthesis CAD tools developed at UC Berkeley (SIS) for application to superconductor digital circuits. The issues specific to superconducting circuits at the synthesis level include the use of multi-phase ac clocking for combinational logic, latching behavior with resetting time constraints, and dual-rail noninverting logic.<>

Keywords

circuit CAD; combinational circuits; high level synthesis; logic CAD; logic design; network synthesis; superconducting logic circuits; combinational logic; computer-aided design; dual-rail noninverting logic; gate-level netlist; high-level circuit; latching; multi-phase AC clocking; superconducting digital circuits; synthesis CAD tools; time resetting; Application software; Circuit synthesis; Clocks; Combinational circuits; Design automation; Digital circuits; Logic circuits; Logic design; Superconducting devices; Superconducting logic circuits;

fLanguage

English

Journal_Title

Applied Superconductivity, IEEE Transactions on

Publisher

ieee

ISSN

1051-8223

Type

jour

DOI

10.1109/77.403307

Filename

403307