Capacitive Inter-Chip Data and Power Transfer for 3-D VLSI

Author

Culurciello, Eugenio ; Andreou, Andreas G.

Author_Institution

Dept. of Electr. Eng., Yale Univ., New Haven, CT

Volume

53

Issue

12

fYear

2006

Firstpage

1348

Lastpage

1352

Abstract

We report on inter-chip bidirectional communication and power transfer between two stacked chips. The experimental prototype system components were fabricated in a 0.5-mum silicon-on-sapphire CMOS technology. Bi-directional communication between the two chips is experimentally measured at 1Hz-15 MHz. The circuits on the floating top chip are powered with capacitively coupled energy using a charge pump. This is the first demonstration of simultaneous nongalvanic power and data transfer between chips in a stack. The potential use in 3-D VLSI is aimed at reducing costs and complexity that are associated with galvanic inter-chip vias in 3-D integration

Keywords

CMOS integrated circuits; VLSI; system-on-chip; 0.5 micron; 1 to 15000000 Hz; 3D VLSI; CMOS technology; bidirectional communication; capacitive inter chip data; capacitively coupled energy; charge pump; data transfer; nongalvanic power; power transfer; silicon on sapphire; Bidirectional control; CMOS process; CMOS technology; Coupling circuits; Galvanizing; Multichip modules; Prototypes; Sensor arrays; Silicon on insulator technology; Very large scale integration; AC coupling; capacitive coupling; chip-to-chip communication; multichip module; proximity communication; silicon-on-insulator (SOI); silicon-on-sapphire (SOS); three- dimensional (3-D) integration;

fLanguage

English

Journal_Title

Circuits and Systems II: Express Briefs, IEEE Transactions on

Publisher

ieee

ISSN

1549-7747

Type

jour

DOI

10.1109/TCSII.2006.885073

Filename

4033147