Single-Event Upset and Scaling Trends in New Generation of the Commercial SOI PowerPC Microprocessors

Author

Irom, Farokh ; Farmanesh, Farhad ; Kouba, Coy K.

Author_Institution

Jet Propulsion Lab., California Inst. of Technol., Pasadena, CA

Volume

53

Issue

6

fYear

2006

Firstpage

3563

Lastpage

3568

Abstract

Single-event upset effects from heavy ions are measured for Motorola silicon-on-insulator (SOI) microprocessor with 90 nm feature sizes. The results are compared with previous results for SOI microprocessors with feature sizes of 130 and 180 nm. The cross section of the 90 nm SOI processors is smaller than results for 130 and 180 nm counterparts, but the threshold is about the same. The scaling of the cross section with reduction of feature size and core voltage for SOI microprocessors is discussed

Keywords

integrated circuit measurement; microprocessor chips; radiation effects; silicon-on-insulator; 130 nm; 180 nm; 90 nm; Motorola silicon-on-insulator microprocessor; SOI PowerPC microprocessors; heavy ions effects; scaling trends; single-event upset; Clocks; Frequency; Microprocessors; Power generation; Semiconductor films; Silicon on insulator technology; Single event upset; Size measurement; Space technology; Voltage; Cyclotron; heavy ion; microprocessors; silicon on insulator;

fLanguage

English

Journal_Title

Nuclear Science, IEEE Transactions on

Publisher

ieee

ISSN

0018-9499

Type

jour

DOI

10.1109/TNS.2006.884383

Filename

4033571