A 1.2-V 0.25-μm clock output pixel architecture with wide dynamic range and self-offset cancellation

Author

Lai, Cheng-Hsiao ; King, Ya-Chin ; Huang, Shi-Yu

Author_Institution

Dept. of Electr. Eng., Nat. Tsing-Hua Univ., Hsinchu, Taiwan

Volume

6

Issue

2

fYear

2006

fDate

4/1/2006 12:00:00 AM

Firstpage

398

Lastpage

405

Abstract

A 10T/pixel CMOS digital pixel sensor with clock count output, ultra low supply voltage, and wide dynamic range is presented. The pixel fabricated by a standard 0.25-μm CMOS logic process comprises a reset transistor, a photo-diode, a comparator, and an inverter with pixel size of 9.4×9.4 μm² and 24% fill factor. The amplified logarithmic output response similar to the light response of human eye is demonstrated in this work. The pixel can operate at a supply voltage as low as 1.2 V without affecting its output characteristics. The dynamic range of this cell limited by either the subsequent analog-to-digital circuit resolution or the rising and falling time of output clock is higher than 90 dB with an 8-bit resolution.

Keywords

CMOS image sensors; analogue-digital conversion; clocks; low-power electronics; 0.25 micron; 1.2 V; CMOS digital pixel sensor; CMOS logic process; active pixel sensor; amplified logarithmic output response; analog-to-digital circuit resolution; clock output pixel architecture; self-offset cancellation; ultra low supply voltage; wide dynamic range; CMOS image sensors; CMOS logic circuits; CMOS technology; Clocks; Dynamic range; Humans; Lighting; Low voltage; Optical imaging; Pixel; ADC; Active pixel sensor (APS); digital pixel sensor (DPS); dynamic range; fill factor; pixel size; sensitivity;

fLanguage

English

Journal_Title

Sensors Journal, IEEE

Publisher

ieee

ISSN

1530-437X

Type

jour

DOI

10.1109/JSEN.2006.870144

Filename

1608082