Title :
Data Collection from FASTBUS to a DEC UNIBUS Processor through the UNIBUS-Processor Interface
Author :
Larwill, M. ; Pordes, R. ; Barsotti, E. ; Lesny, D.
Author_Institution :
Fermi National Accelerator Laboratory P.O. Box 500, Batavia, Illinois 60510
Abstract :
This paper describes the use of the UNIBUS Processor Interface, an interface between FASTBUS and the Digital Equipment Corporation UNIBUS. The UPI was developed by Fermilab and the University of Illinois. Details of the use of this interface in a high energy physics experiment at Fermilab are given. The paper includes a discussion of the operation of the UPI on the UNIBUS of a VAX-11, and plans for using the UPI to perform data acquisition from FASTBUS to a VAX-11 Processor.
Keywords :
Contracts; Data acquisition; Fastbus; Finite impulse response filter; Laboratories; Logic; Read-write memory; Registers; Testing; Voice mail;
Journal_Title :
Nuclear Science, IEEE Transactions on
DOI :
10.1109/TNS.1983.4333058
