I/O placement for FPGAs with multiple I/O standards

In this paper, we present the first exact approach to solve the constrained input/output (I/O) placement problem for field programmable gate arrays (FPGAs) that support multiple I/O standards. We derive a compact integer linear program formulation for the constrained I/O placement problem. The size of the integer linear program derived is independent of the number of I/O objects to be placed and, hence, is scalable to very large design instances. For example, for a Xilinx Virtex-E FPGA, the number of integer variables required is never more than 32 and is much smaller for practical design instances. Extensive experimental results using a noncommercial integer linear program solver shows that it only takes seconds to solve the resultant integer linear program in practice. In addition, we also propose a new overall placement flow to place both core logic and I/Os.