DocumentCode
872663
Title
A coincident-select MOS storage array
Author
Friedrich, Joseph H.
Volume
3
Issue
3
fYear
1968
Firstpage
280
Lastpage
285
Abstract
Utilization of MOS monolithic storage arrays in random access memory offers low cost with high performance. An approach is described using a 64-bit coincident-select MOS storage device as the fundamental building block to achieve the low-cost high-performance goals. Device and circuit descriptions as well as cross-talk models are discussed.
Keywords
Integrated circuits; integrated circuits; Aluminum; Circuit optimization; Costs; Crosstalk; Driver circuits; Flip-flops; Power dissipation; Power supplies; Random access memory; Threshold voltage;
fLanguage
English
Journal_Title
Solid-State Circuits, IEEE Journal of
Publisher
ieee
ISSN
0018-9200
Type
jour
DOI
10.1109/JSSC.1968.1049901
Filename
1049901
Link To Document