DocumentCode
875433
Title
Transient Radiation Upset Simulations of CMOS Memory Circuits
Author
Massengill, Lloyd W. ; Diehl-Nagle, Sherra E.
Author_Institution
Department of Electrical and Computer Engineering North Carolina State University Raleigh, NC 27695-7911
Volume
31
Issue
6
fYear
1984
Firstpage
1337
Lastpage
1343
Abstract
A computer simulation technique has identified and modeled a dominant mechanism for transient ionizing radiation induced logic upset in certain CMOS integrated circuits. This mechanism, termed ´rail span collapse´ here, has accounted for the discrepancy between simulated upsets of these circuits using only local radiation induced photocurrents and the experimentally observed upset dose-rate levels.
Keywords
CMOS integrated circuits; CMOS logic circuits; CMOS memory circuits; Circuit simulation; Computational modeling; Computer simulation; Integrated circuit modeling; Ionizing radiation; Rails; Semiconductor device modeling;
fLanguage
English
Journal_Title
Nuclear Science, IEEE Transactions on
Publisher
ieee
ISSN
0018-9499
Type
jour
DOI
10.1109/TNS.1984.4333507
Filename
4333507
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