DocumentCode
876202
Title
Unified parallel lattice structures for time-recursive discrete cosine/sine/Hartley transforms
Author
Liu, K. J Ray ; Chiu, Ching-Te
Author_Institution
Dept. of Electr. Eng., Maryland Univ., College Park, MD, USA
Volume
41
Issue
3
fYear
1993
fDate
3/1/1993 12:00:00 AM
Firstpage
1357
Lastpage
1377
Abstract
Unified efficient computations of the discrete cosine transform (DCT), discrete sine transform (DST), discrete Hartley transform (DHT), and their inverse transforms employing the time-recursive approach are considered. Unified parallel lattice structures that can dually generate the DCT and DST simultaneously as well the DHT are developed. These structures can obtain the transformed data for sequential input time recursively with a throughput rate of one per clock cycle. The total number of multipliers required is a linear function of the transform size N , with no constraint on N . The resulting architectures are regular, modular, and without global communication so that they are very suitable for VLSI implementation for high-speed applications. It is shown that the DCT, DST, DHT and their inverse transforms share an almost identical lattice structure. The tradeoff between time and area for the block data processing is considered
Keywords
VLSI; parallel architectures; transforms; DCT; DHT; DST; VLSI; area; block data processing; clock cycle; discrete Hartley transform; discrete cosine transform; discrete sine transform; high-speed applications; inverse transforms; multipliers; parallel architectures; parallel lattice structures; sequential input time; throughput rate; time recursive transforms; transform coding; transform size; Discrete Fourier transforms; Discrete cosine transforms; Discrete transforms; HDTV; ISDN; Image coding; Karhunen-Loeve transforms; Lattices; Signal processing; Very large scale integration;
fLanguage
English
Journal_Title
Signal Processing, IEEE Transactions on
Publisher
ieee
ISSN
1053-587X
Type
jour
DOI
10.1109/78.205735
Filename
205735
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