DocumentCode
876575
Title
Optimisation technique in delay-equaliser design by digital computer
Author
Rakovich, B.D.
Author_Institution
University of Belgrade, Department of Electronics, Faculty of Electrical Engineering, Belgrade, Yugoslavia
Volume
4
Issue
7
fYear
1968
Firstpage
123
Lastpage
126
Abstract
This letter presents the necessary modifications in a method of synthesis of phase equalisers, which has been described in a companion paper, in order to make it suitable for automatic computation of phase equalisers of minimum complexity that will correct the assigned delay characteristic to within a prescribed error. The flow diagram for the program organisation is also given.
Keywords
circuit theory; computer applications;
fLanguage
English
Journal_Title
Electronics Letters
Publisher
iet
ISSN
0013-5194
Type
jour
DOI
10.1049/el:19680096
Filename
4210045
Link To Document