A cyclic charge-balancing A/D converter with capacitor mismatch error compensation

Author

Tsukamoto, Kousuke ; Miyata, Takeo ; Takagi, Tasuku

Author_Institution

Dept. of Electr. & Electron. Eng., Ibaraki Univ., Hitachi, Japan

Volume

42

Issue

1

fYear

1993

fDate

2/1/1993 12:00:00 AM

Firstpage

35

Lastpage

38

Abstract

An algorithm is proposed for improving the speed of a charge-balancing analog-to-digital converter implemented by a switched-capacitor technique. The number of charge transfer operations required for a conversion is reduced. For example, the conversion rate in 16-b conversion is improved more than 128 times as compared to a conventional charge-balancing analog-to-digital converter. A compensation algorithm for the capacitor mismatch error is also proposed. The results of prototype experiments indicate that the maximum integral nonlinearity error is reduced to less than 0.04 LSB in 6-b conversion

Keywords

analogue-digital conversion; error compensation; switched capacitor networks; capacitor mismatch error compensation; charge transfer; compensation algorithm; cyclic charge-balancing A/D converter; integral nonlinearity error; switched-capacitor; Analog-digital conversion; Charge transfer; Error compensation; Instruments; Linearity; Prototypes; Switched capacitor circuits; Switching circuits; Switching converters; Voltage;

fLanguage

English

Journal_Title

Instrumentation and Measurement, IEEE Transactions on

Publisher

ieee

ISSN

0018-9456

Type

jour

DOI

10.1109/19.206676

Filename

206676