DocumentCode :
878171
Title :
Rise time of emitter-coupled logic circuits including the effects of collector-to-base capacitances
Author :
Barna, Arpad
Volume :
8
Issue :
4
fYear :
1973
fDate :
8/1/1973 12:00:00 AM
Firstpage :
284
Lastpage :
286
Abstract :
Rise times of emitter-coupled logic circuits are computed, taking into account collector-to-base capacitances as well as gain-bandwidth products, ohmic base resistances, external stray capacitances, and the finite rise time of the input signal. Basic considerations are discussed, and explicit expressions and graphs are given for a wide range of circuit parameters.
Keywords :
Capacitance; Logic circuits; Transistor-transistor logic; capacitance; logic circuits; transistor-transistor logic; Capacitance; Digital integrated circuits; Inspection; Logic circuits; Roentgenium; Switching circuits; Temperature; Voltage;
fLanguage :
English
Journal_Title :
Solid-State Circuits, IEEE Journal of
Publisher :
ieee
ISSN :
0018-9200
Type :
jour
DOI :
10.1109/JSSC.1973.1050398
Filename :
1050398
Link To Document :
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