DocumentCode
878324
Title
Five-transistor memory cells in ESFI MOS technology
Author
Goser, Karl ; Pomper, Michael
Volume
8
Issue
5
fYear
1973
fDate
10/1/1973 12:00:00 AM
Firstpage
324
Lastpage
326
Abstract
Compared with a conventional six-transistor memory cell in complementary MOS technology, a five-transistor cell only needs about 70 percent of the area. Memory matrices have been manufactured on epitaxial silicon films on insulators, using such cells with an area of 5700 μm/SUP 2/ (9 mil/SUP 2/). In addition, proposals for a sense circuit are made and the typical data of a 2048-b memory chip are estimated.
Keywords
Digital integrated circuits; Flip-flops; Semiconductor storage systems; digital integrated circuits; flip-flops; semiconductor storage systems; Circuits; Flip-flops; Insulation; Manufacturing; Proposals; Read-write memory; Semiconductor films; Silicon on insulator technology; Switches; Voltage;
fLanguage
English
Journal_Title
Solid-State Circuits, IEEE Journal of
Publisher
ieee
ISSN
0018-9200
Type
jour
DOI
10.1109/JSSC.1973.1050411
Filename
1050411
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