DocumentCode :
879646
Title :
Accurate single-event-transient analysis via zero-delay logic simulation
Author :
Violante, Massimo
Author_Institution :
Dipt. di Automatica e Informatica, Politecnico di Torino, Italy
Volume :
50
Issue :
6
fYear :
2003
Firstpage :
2113
Lastpage :
2118
Abstract :
We describe an approach for analyzing single-event transients (SETs) in combinational circuits. The approach analyzes SETs via zero-delay simulation with the same accuracy of timing simulators, but with a speedup of three orders of magnitude.
Keywords :
combinational circuits; radiation hardening (electronics); semiconductor storage; accurate single-event-transient analysis; combinational circuits; speedup; timing simulators; zero-delay logic simulation; zero-delay simulation; Analytical models; Circuit analysis; Circuit faults; Circuit simulation; Circuit topology; Combinational circuits; Fault diagnosis; Logic; Timing; Transient analysis;
fLanguage :
English
Journal_Title :
Nuclear Science, IEEE Transactions on
Publisher :
ieee
ISSN :
0018-9499
Type :
jour
DOI :
10.1109/TNS.2003.820729
Filename :
1263850
Link To Document :
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