DocumentCode :
882884
Title :
A matrix amplifier in 0.18-/spl mu/m SOI CMOS
Author :
Park, Jinho ; Allstot, David J.
Author_Institution :
Marvel Semicond. Inc., Santa Clara, CA
Volume :
53
Issue :
3
fYear :
2006
fDate :
3/1/2006 12:00:00 AM
Firstpage :
561
Lastpage :
568
Abstract :
A fully integrated matrix amplifier with two rows and four columns (2-by-4) fabricated in a three-layer metal 0.18-mum silicon-on-insulator (SOI) CMOS process is presented. It exhibits an average pass-band gain of 15 dB and a unity-gain bandwidth of 12.5 GHz. The input and output ports are matched to 50 Omega using m-derived half sections; the measured S11 and S22 values exceed -7 and -12 dB, respectively. Integrated in 2.0times2.9mm2 , it dissipates 233.4 mW total from 2.4- and 1.8-V power supplies
Keywords :
CMOS integrated circuits; S-parameters; microwave amplifiers; silicon-on-insulator; 0.18 micron; 1.8 V; 12.5 GHz; 15 dB; 2.4 V; 233.4 mW; 50 ohm; CMOS process; SOI CMOS; matrix amplifier; pass-band gain; silicon-on-insulator; unity-gain bandwidth; Analog integrated circuits; Bandwidth; Broadband amplifiers; CMOS analog integrated circuits; Distributed amplifiers; Operational amplifiers; Power transmission lines; Radiofrequency amplifiers; Topology; Transmission line matrix methods; CMOS analog integrated circuits; CMOS matrix amplifier; RF integrated circuits;
fLanguage :
English
Journal_Title :
Circuits and Systems I: Regular Papers, IEEE Transactions on
Publisher :
ieee
ISSN :
1549-8328
Type :
jour
DOI :
10.1109/TCSI.2005.859054
Filename :
1610854
Link To Document :
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