CMOS device noise considerations for terabit lightwave systems

An improved model to predict sensitivity of p-i-n lightwave receivers using CMOS technology is proposed. This model incorporates the latest understanding of excess channel noise observed in nanoscale MOSFETs. For the case of an ideal channel filter, the results are presented in an analytical closed form. For nonideal channels, the concept of higher order Personick integrals is introduced. Up to 10 Gb/s, the results predicted by the above model closely mimic the existing CMOS data published over the last 20 years. Above 10 Gb/s, due to lack of CMOS data, projections are evaluated against the nonsilicon technologies. The predictions compare very favorably with the measured system performance using high electron mobility transistors and heterojunction bipolar transistors. The findings thus indicate that CMOS should claim its status as the low-cost high-performance highly integrated technology of choice for lightwave applications beyond 10 Gb/s.