• DocumentCode
    88462
  • Title

    GPU-Parallel Implementation of the Edge-Directed Adaptive Intra-Field Deinterlacing Method

  • Author

    Jiaji Wu ; Zhan Song ; Gwanggil Jeon

  • Author_Institution
    Key Lab. of Intell. Perception & Image Understanding of Minist. of Educ. of China, Xidian Univ., Xi´an, China
  • Volume
    10
  • Issue
    9
  • fYear
    2014
  • fDate
    Sept. 2014
  • Firstpage
    746
  • Lastpage
    753
  • Abstract
    This paper proposes an efficient GPU-based massively parallel implementation of the edge-directed adaptive intra-field deinterlacing method which interpolates the missing pixels based on the deinterlaced covariance estimated from the interlaced covariance according to the geometric duality between the interlaced and the deinterlaced covariance. Although the edge-directed adaptive intra-field deinterlacing method can obtain better visual quality than conventional intra-field deinterlacing methods, the time-consuming computation is usually the bottleneck of this deinterlacing method. In order to tackle the problem, Graphics Processing Units (GPUs), as opposed to traditional CPU architectures, are better candidates to speed up the computation process. The proposed method interpolates more than one missing pixel at a time in order to gain a significant speedup compared to the case of interpolating just one missing pixel at a time. Experimental results show that we obtained a speedup of 94.6 × when the I/O transfer time was taken into account, compared to the original single-threaded C CPU code with the -O2 compiling optimization.
  • Keywords
    computational geometry; covariance matrices; graphics processing units; image resolution; interpolation; parallel architectures; video signal processing; GPU parallel implementation; I/O transfer time; deinterlaced covariance estimation; edge directed adaptive intrafield deinterlacing method; geometric duality; graphics processing unit; missing pixel interpolation; time consuming computation; visual quality; Bandwidth; Graphics processing units; Image edge detection; Instruction sets; Memory management; Registers; CUDA; GPU; deinterlacing; interpolation;
  • fLanguage
    English
  • Journal_Title
    Display Technology, Journal of
  • Publisher
    ieee
  • ISSN
    1551-319X
  • Type

    jour

  • DOI
    10.1109/JDT.2014.2319232
  • Filename
    6803847