Title :
Two Reaction Model of Interface Trap Annealing
Author :
Reed, Michael L. ; Plummer, James D.
Author_Institution :
Center for Integrated Systems Stanford University Stanford, CA 94305-4070
Abstract :
Interface trap anneal kinetics have been studied using capacitance - voltage measurements and rapid thermal annealing. Power law kinetics have been obtained for aluminum gate devices. Anneal kinetics have been studied as a function of oxide thickness, anneal ambient, radiation damage, substrate orientation, bulk conductivity type, and temperature. A two - reaction model is proposed to explain the observed kinetics.
Keywords :
Aluminum; Capacitance; Capacitance-voltage characteristics; Density measurement; Frequency; Kinetic theory; Production; Rapid thermal annealing; Rapid thermal processing; System testing;
Journal_Title :
Nuclear Science, IEEE Transactions on
DOI :
10.1109/TNS.1986.4334578