The Automatic Sequencing of Block-Operators in the Digital Simulation of Analog and Analog-Hybrid Computers

The all-digital simulation of analog or analog-hybrid systems requires that the processing sequence of the elements simulated be admissible in the sense that no element should be processed until the values of all of its input variables are known. This paper presents an algorithm to automatically ascertain an admissible processing sequence from a given interconnection configuration, and to automatically detect any algebraic loops contained therein. As a result, a parallel language, rather than a sequential one, may be used to write source programs for digital simulation.