DocumentCode
888722
Title
An Investigation of the Potential of MOS Transistor Memories
Author
Pleshko, P. ; Terman, L.M.
Author_Institution
Thomas J. Watson Research Center, IBM Corporation, Yorktown Heights, N. Y.
Issue
4
fYear
1966
Firstpage
423
Lastpage
427
Abstract
The design and performance characteristics of a 128X64 MOS transistor memory is given. The storage cell used operates with a low standby power, 0.1 mW. The memory operates with a 12-ns access time, 35-ns read cycle time, and a 60-ns write cycle time.
Keywords
Costs; Flip-flops; Integrated circuit technology; Logic devices; MOS devices; MOSFETs; Read-write memory; Voltage; Writing;
fLanguage
English
Journal_Title
Electronic Computers, IEEE Transactions on
Publisher
ieee
ISSN
0367-7508
Type
jour
DOI
10.1109/PGEC.1966.264348
Filename
4038814
Link To Document