A 4-mW monolithic CMOS LNA at 5.7GHz with the gate resistance used for input matching

Design and measured results of a fully integrated 5.7-GHz CMOS low-noise amplifier (LNA) is presented. To design this LNA, the parasitic input resistance of a metal-oxide-semiconductor field-effect transistor (MOSFET) is converted to 50Ω by a simple L-C network, hence eliminating the need for source degeneration. It is shown, by means of compact expressions, that this matching method enhances the effective transconductance of the LNA by a factor that is inversely proportional to a MOSFET´s input resistance. The effect of our proposed method on the noise figure (NF) of the LNA is also discussed. With an 11.45-dB power gain and a 3.4-dB NF at 4mW of dc power, the presented LNA achieves the best overall performance when compared with the most recently published LNAs.