DocumentCode
889483
Title
A 5-V Only 16-kbit Stacked-Capacitor MOS RAM
Author
Koyanagi, Mitsumasa ; Sakai, Yoshio ; Ishihara, Masamichi ; Tazunoki, Masanori ; Hashimoto, Norikazu
Volume
15
Issue
4
fYear
1980
Firstpage
661
Lastpage
666
Abstract
A novel one-transistor-type MOS RAM is discussed. This memory cell gives a remarkable area reduction and/or increase in storage capacitance by stacking the main portion of the storage capacitor on the address transistor, bit lines, or field oxides. It is callled a stacked-capacitor (STC) RAM. This STC memory has a three-level poly-Si structure. The stacked capacitor has poly-Si-Si/sub 3/N/sub 4/-poly-Si (or Al) structure. A 16-kbit STC RAM has been fabricated with 3-/spl mu/m technology and operated successfully. Memory performance is strikingly improved by using STC cells.
Keywords
Aluminium; Elemental semiconductors; Field effect integrated circuits; Integrated circuit technology; Integrated memory circuits; Random-access storage; Silicon; Silicon compounds; Capacitance; Circuits; Geometry; Lithography; MOS capacitors; Random access memory; Read only memory; Read-write memory; Stacking; Voltage;
fLanguage
English
Journal_Title
Solid-State Circuits, IEEE Journal of
Publisher
ieee
ISSN
0018-9200
Type
jour
DOI
10.1109/JSSC.1980.1051452
Filename
1051452
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