Title :
Low power PCM CODEC and filter system
Author :
Iwata, Atsushi ; Uchimura, Kuniharu ; Hattori, Sanshiro ; Shimizu, Hiroaki ; Ogasawara, Kazuo
fDate :
4/1/1981 12:00:00 AM
Abstract :
Describes the architecture and circuit design technology for a low-power single-channel PCM CODEC and filter system. This system consists of 2 CMOS LSIs-the encoder/decoder chip using the C-R D/A conversion technique and the dual channel filter chip using the switched capacitor technique. Experimental results show how these operate with 71 mW power consumption and meet the requirements.
Keywords :
Codecs; Field effect integrated circuits; Pulse-code modulation; Switched capacitor networks; Switched filters; codecs; field effect integrated circuits; pulse-code modulation; switched capacitor networks; switched filters; CMOS technology; Capacitors; Codecs; Decoding; Energy consumption; Filters; Large scale integration; Phase change materials; Power system economics; Telephony;
Journal_Title :
Solid-State Circuits, IEEE Journal of
DOI :
10.1109/JSSC.1981.1051544
