Silicon MESFET digital circuit techniques

Silicon MESFET circuits of gate-level complexity are described and compared. Circuits using all-depletion devices (AD circuits) are contrasted with circuits using both enhancement and depletion devices (ED circuits). Computer-aided simulations are used to make the comparisons. Circuit techniques that reduce the sensitivity of the circuit to parasitic capacitances are emphasized. The dynamic logic capability of MESFETs and of the interfacing to other logic families is discussed. Verification with experimental data is provided with results from AD designs of ring oscillators, divided-by-two circuits, and drivers.