DocumentCode
891395
Title
A Design Procedure for Radiation Hardening Certain NOR Gate Logic Circuits
Author
Maurer, Harold E.
Author_Institution
Guidance Laboratory, NASA Electronics Research Center, Cambridge, Mass.
Issue
4
fYear
1967
Firstpage
519
Lastpage
522
Keywords
Clustering algorithms; Covariance matrix; Euclidean distance; Logic circuits; Pattern classification; Pattern recognition; Piecewise linear approximation; Piecewise linear techniques; Prototypes; Radiation hardening;
fLanguage
English
Journal_Title
Electronic Computers, IEEE Transactions on
Publisher
ieee
ISSN
0367-7508
Type
jour
DOI
10.1109/PGEC.1967.264684
Filename
4039127
Link To Document