Monolithic analog multiplier-divider

The design of a precision general-purpose monolithic analog multiplier-divider based on the principle of the variable transconductance of bipolar transistors is described. The device has two new aspects: first, an eight-transistor multiplier-divider core, and second, an improvement in the accuracy and high-frequency behavior of the input and output circuits having monolithic conversion resistors. The transfer function ν/SUB w/=ν/SUB x/ν/SUB y//ν/SUB z/ is only dependent on external voltages. An advantage of the multiplier-divider over a multiplier with a fixed internal voltage reference is that the external signal voltages can be accurately related to the relevant reference voltage. Moreover, the additional divider input enlarges the application field. The maximum signal voltages are ±10 V. The untrimmed inaccuracy is typically 2 percent. The nonlinearity is ±0.1 percent. The bandwidth is 6.5 MHz, and the slew rate is 50 V/μs.