DocumentCode
891754
Title
A 40 MHz multi applicable digital signal processing chip
Author
Veendrick, Harry J.M. ; Pfennings, Leo C.
Volume
17
Issue
1
fYear
1982
Firstpage
40
Lastpage
43
Abstract
A multi applicable building block capable of performing several typical signal processing (sub) operations such as addition, multiplication, multiplexing, etc. is discussed. The chip, made in 4 /spl mu/m E/D NMOS technology with implanted undercrossings, runs at clock frequencies up to 40 MHz, which is particularly suited for digital video signal processing.
Keywords
Digital integrated circuits; Field effect integrated circuits; Signal processing; digital integrated circuits; field effect integrated circuits; signal processing; Clocks; Digital signal processing chips; Digital signal processors; Frequency; Hardware; Low earth orbit satellites; MOS devices; Read only memory; Signal resolution; Video signal processing;
fLanguage
English
Journal_Title
Solid-State Circuits, IEEE Journal of
Publisher
ieee
ISSN
0018-9200
Type
jour
DOI
10.1109/JSSC.1982.1051683
Filename
1051683
Link To Document