High-power high-speed silicon transistor

High-power high-speed silicon transistors were fabricated on a single wafer using a double-epitaxial single-diffused technique. An N^-collector region was deposited on an N⁺substrate material. The base region was also formed epitaxially by depositing, in situ, a P⁺layer on the top of the collector region; and the emitter region was formed by diffusion. The transistors were found to have a collector current (Ic) capability of 150 A with a total switching time of 2 µs.