• DocumentCode
    892848
  • Title

    An MSI GaAs integrated circuit: 4 bit arithmetic and logic unit

  • Author

    Suyama, Katsuhiko ; Kusakawa, Hirotsugu ; Okamura, Shigeru ; Fukuta, Masumi

  • Volume
    17
  • Issue
    4
  • fYear
    1982
  • Firstpage
    653
  • Lastpage
    657
  • Abstract
    A GaAs 4 bit arithmetic and logic unit (ALU) has been fabricated using a planar ion implantation technique with 2 /spl mu/m gate length FETs. The basic circuit is a buffered FET logic (BFL) circuit composed of normally on GaAs MESFETs and Schottky diodes. The active layers of the FETs and diodes are made by implanting Si into Cr-doped semi-insulating GaAs substrate. This ALU contains 629 FETs and 225 diodes within an area of 1.6/spl times/2.1 mm/SUP 2/. The ALU, capable of driving 50 /spl Omega/ transmission lines, is mounted on a 24 lead flat package. A delay time of 2.1 ns through the data path and a total power dissipation of 1.2 W with supply voltages of +5 V and -3 V have been obtained.
  • Keywords
    Field effect integrated circuits; Gallium arsenide; III-V semiconductors; Integrated logic circuits; Ion implantation; field effect integrated circuits; gallium arsenide; integrated logic circuits; ion implantation; Arithmetic; Delay effects; FETs; Gallium arsenide; Ion implantation; Logic circuits; MESFETs; Packaging; Power transmission lines; Schottky diodes;
  • fLanguage
    English
  • Journal_Title
    Solid-State Circuits, IEEE Journal of
  • Publisher
    ieee
  • ISSN
    0018-9200
  • Type

    jour

  • DOI
    10.1109/JSSC.1982.1051793
  • Filename
    1051793