DocumentCode
893329
Title
Thermal noise, intermittent failures, and yield in Josephson circuits
Author
Raver, Norman
Volume
17
Issue
5
fYear
1982
fDate
10/1/1982 12:00:00 AM
Firstpage
932
Lastpage
937
Abstract
It is shown that a Josephson circuit is susceptible to thermal noise even though the operating temperature is 4.2K. The effect of thermal noise increases with bias and decreases with I/SUB m/, the maximum Josephson current. Each circuit on a Josephson chip will have a slightly different bias and I/SUB m/ due to processing spreads, and these variations can cause low yield or unacceptable thermal noise. Chip yield and thermal noise are calculated for a range of parameters, showing the tradeoff between them.
Keywords
Digital integrated circuits; digital integrated circuits; Central Processing Unit; Circuit noise; Josephson effect; Josephson junctions; Logic devices; Superconducting device noise; Superconducting devices; Temperature; Threshold voltage; Tires;
fLanguage
English
Journal_Title
Solid-State Circuits, IEEE Journal of
Publisher
ieee
ISSN
0018-9200
Type
jour
DOI
10.1109/JSSC.1982.1051842
Filename
1051842
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