DocumentCode
894514
Title
Ultrathin gate-oxide breakdown-reversibility at low voltage
Author
Cheung, Kin P.
Author_Institution
Dept. of Electr. & Comput. Eng., Rutgers Univ., Piscataway, NJ, USA
Volume
6
Issue
1
fYear
2006
fDate
3/1/2006 12:00:00 AM
Firstpage
67
Lastpage
74
Abstract
Solid-insulator breakdown always leads to a permanent conduction path that is irreversible. This is a built-in assumption in all gate-oxide breakdown reliability measurement and lifetime projection. This assumption is not valid when the gate-oxide thickness is less than 2 nm and the operation voltage is 1 V or less. The authors examine the impact of reversible breakdown using breakdown data from 12 000 devices stressed by plasma charging damage. The data support the notion that when the surge current is limited at breakdown, the breakdown event may not leave any mark such as a permanent conduction path. The implication is that the commonly used accelerated-stress test, such as time dependent dielectric breakdown (TDDB), may be underestimating the actual gate-oxide lifetime by as much as a million folds.
Keywords
MOSFET; low-power electronics; semiconductor device breakdown; semiconductor device reliability; accelerated-stress test; actual gate-oxide lifetime; gate-oxide breakdown reversibility; lifetime projection; plasma charging damage; reliability estimation; reliability measurement; semiconductor device breakdown; solid-insulator breakdown; time dependent dielectric breakdown; ultrathin breakdown reversibility; Dielectric breakdown; Electric breakdown; Insulation; Life estimation; Life testing; Low voltage; MOSFET circuits; Nanoelectronics; Plasma measurements; Stress; MOSFETs; nanotechnology; reliability estimation; semiconductor device breakdown;
fLanguage
English
Journal_Title
Device and Materials Reliability, IEEE Transactions on
Publisher
ieee
ISSN
1530-4388
Type
jour
DOI
10.1109/TDMR.2006.870350
Filename
1618657
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