A Leakage Current Replica Keeper for Dynamic Circuits

Author

Lih, Yolin ; Tzartzanis, Nestoras ; Walker, William W.

Volume

42

Issue

1

fYear

2007

Firstpage

48

Lastpage

55

Abstract

We present a leakage current replica (LCR) keeper for dynamic domino gates that uses an analog current mirror to replicate the leakage current of a dynamic gate pull-down stack and thus tracks process, voltage, and temperature. The proposed keeper has an overhead of one field-effect transistor per gate plus a portion of a shared current mirror. Techniques for properly sizing LCR keepers are presented. Using these sizings, LCR keepers allow design of and-or circuits with 30% more legs than conventional keepers at the same noise margin in a 90-nm, 1.2-V CMOS logic process. Furthermore, 16-24-leg dynamic AO circuits are 25%-40% faster when using the replica keeper. We demonstrated the circuit operation on a 1024 words times 72 bits, 3W/4R embedded SRAM macro using a four-stage LCR-keeper domino structure for a read-out circuit

Keywords

CMOS logic circuits; SRAM chips; current mirrors; field effect transistors; leakage currents; logic gates; readout electronics; 1.2 V; 90 nm; AND-OR circuits; CMOS logic process; SRAM; analog current mirror; domino gates; gate pull-down stack; leakage current replica keeper; readout circuit; CMOS logic circuits; CMOS process; Circuit noise; FETs; Leakage current; Leg; Logic design; Mirrors; Temperature; Voltage; Dynamic logic; SRAM; keeper; leakage; precharged logic; process variation; register file;

fLanguage

English

Journal_Title

Solid-State Circuits, IEEE Journal of

Publisher

ieee

ISSN

0018-9200

Type

jour

DOI

10.1109/JSSC.2006.885051

Filename

4039592