DocumentCode
896791
Title
Modules and Supporting Hardware for FASTBUS Test and Diagnostic Purposes
Author
Bertolucci, B.
Author_Institution
Stanford Linear Accelerator Center Stanford University, Stanford, California 94305
Volume
29
Issue
1
fYear
1982
Firstpage
79
Lastpage
83
Abstract
This paper contains detailed descriptions and circuitry of some modules and supporting hardware for the FASTBUS System developed at SLAC. A fast slave-only Memory Module ("PRIMO"), a Dummy Module ("U2"), a FASTBUS Test Box ("LAIKA"), and a Bus Display Bar ("BBD") have been built, tested and used for test and diagnostic purposes for FASTBUS.
Keywords
Circuit testing; Clocks; Decoding; Fastbus; Hardware; Linear accelerators; Parity check codes; Protocols; Registers; Timing;
fLanguage
English
Journal_Title
Nuclear Science, IEEE Transactions on
Publisher
ieee
ISSN
0018-9499
Type
jour
DOI
10.1109/TNS.1982.4335798
Filename
4335798
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