DocumentCode
896834
Title
FASTBUS Demonstration Systems
Author
Paffrath, L. ; Bertolucci, B. ; Deiss, S. ; Gustavson, D. ; Holmes, T. ; Horelick, D. ; Larsen, R. ; Logg, C. ; Walz, H. ; Barsotti, E. ; Larwill, M. ; Lagerlund, T. ; Pordes, R. ; Taff, L. ; Brown, R. ; Downing, R. ; Haney, M. ; Jackson, B. ; Lesny, D. ;
Author_Institution
Stanford Linear Accelerator Center Stanford University, Stanford, California 94305
Volume
29
Issue
1
fYear
1982
Firstpage
90
Lastpage
93
Abstract
This paper will provide a demonstration of basic FASTBUS hardware and test software. The systems will include single crate segments, simple computer I/O, a fast sequencer and memory, some simple diagnostic and display devices and a UNIBUS to FASTBUS processor interface. The equipment will be set up to show the basic FASTBUS protocols and timing transactions, as well as some of the general initialization software features.
Keywords
Backplanes; Computer displays; Computer interfaces; Fastbus; Hardware; Master-slave; Protocols; Software prototyping; Software systems; Timing;
fLanguage
English
Journal_Title
Nuclear Science, IEEE Transactions on
Publisher
ieee
ISSN
0018-9499
Type
jour
DOI
10.1109/TNS.1982.4335801
Filename
4335801
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