• DocumentCode
    896934
  • Title

    A 1 GHz 50 mW GaAs dual modulus divider IC

  • Author

    Shimizu, Shoichi ; Kamatani, Yukio ; Toyoda, Nobuyuki ; Kanazawa, Katsue ; Mochizuki, Masao ; Terada, Toshiyuki ; Hojo, Akimichi

  • Volume
    19
  • Issue
    5
  • fYear
    1984
  • Firstpage
    710
  • Lastpage
    715
  • Abstract
    A 1-GHz 50-mW GaAs dual modulus divider IC has been realized by using source-coupled FET logic. Dividing values are 128/129 and 64/65. The chip size is 0.94/spl times/1.07 mm, in which 223 FETs, 101 diodes, and 80 resistors are integrated. The platinum buried gate planar FET process is used in the IC fabrication. The maximum toggle frequency is 1.12 GHz and IC current is 9.55 mA at 5 V supply voltage. About 10-30% chip yield was achieved in the wide (0.1-0.4 V) enhancement FET threshold voltage range.
  • Keywords
    Dividing circuits; Flip-flops; Gallium arsenide; III-V semiconductors; Integrated logic circuits; dividing circuits; flip-flops; gallium arsenide; integrated logic circuits; Counting circuits; FET integrated circuits; Frequency conversion; Frequency synthesizers; Gallium arsenide; Logic; Phase locked loops; Schottky diodes; Transceivers; Voltage-controlled oscillators;
  • fLanguage
    English
  • Journal_Title
    Solid-State Circuits, IEEE Journal of
  • Publisher
    ieee
  • ISSN
    0018-9200
  • Type

    jour

  • DOI
    10.1109/JSSC.1984.1052212
  • Filename
    1052212
    • Link To Document
    https://search.isc.ac/dl/search/defaultta.aspx?DTC=49&DC=896934