A programmable CMOS dual channel interface processor for telecommunications applications

A CMOS analog VLSI chip for telecommunications applications has been designed in which many desirable line card features are programmable through a unique interface from the central switching office. The authors emphasize the circuit innovations of some key analog functions realized on the chip, specifically, the operational amplifier family, the precision bandgap reference circuit, and the line balancing function. The die size of the analog VLSI is approximately 50000 mils/SUP 2/, and the active power dissipation is 80 mW with a 1 mW standby mode.