An efficient layout style for two-metal CMOS leaf cells and its automatic synthesis

Author

Yi Hwang, Chi ; Hsieh, Yung-Ching ; Lin, Youn-Long ; Hsu, Yu-Chin

Author_Institution

Dept. of Comput. Sci., Tsing Hua Univ., Hsin-Chu, Taiwan

Volume

12

Issue

3

fYear

1993

fDate

3/1/1993 12:00:00 AM

Firstpage

410

Lastpage

424

Abstract

A layout style that enables either an automatic layout synthesizer or a layout designer to take full advantage of the second metal layer available from today´s technology is proposed. The style not only facilitates power/ground diffusion overlapping but also simplifies the intracell routing problem by having power/ground in the middle and routing in the upper and the lower constraint-free regions. An automatic leaf cell layout synthesizer, called THEDA.P, that is based on the proposed style has been implement. Using the same transistor placement algorithm, THEDA.P outperforms a synthesizer based on T. Uehara and W.M. van Cleemput´s (1981) approach by almost 20% in layout compactness across a wide range of small-scale integrated circuits. THEDA.P has been used to build a standard cell library that was previously handcrafted. Results from designing two modules show that THEDA.P´s layout quality is very competitive

Keywords

CMOS integrated circuits; circuit layout CAD; integrated circuit technology; network routing; THEDA.P; automatic synthesis; integrated circuits; intracell routing problem; layout designer; layout style; power/ground diffusion overlapping; standard cell library; transistor placement algorithm; two-metal CMOS leaf cells; Adders; Application specific integrated circuits; CMOS technology; Flip-flops; Integrated circuit interconnections; Libraries; Multiplexing; Routing; Synthesizers; Very large scale integration;

fLanguage

English

Journal_Title

Computer-Aided Design of Integrated Circuits and Systems, IEEE Transactions on

Publisher

ieee

ISSN

0278-0070

Type

jour

DOI

10.1109/43.215003

Filename

215003