DocumentCode
898008
Title
A High-Speed 1-Mbit EPROM with a Ti-Silicided Gate
Author
Narita, Yoshitaka ; Ohya, Shuichi ; Murao, Yukinobu ; Kanauchi, Shushi ; Kikuchi, Masanori
Volume
20
Issue
1
fYear
1985
Firstpage
418
Lastpage
421
Abstract
A high-speed and high-density 1-Mbit EPROM has been developed by utilizing a 1.0-/spl mu/m minimum design rule and Ti-silicided gate technology. Selective Ti silicidation of the poly-Si gate has been successfully employed to reduce the word line resistance. The sheet resistance has been reduced to about 2 /spl Omega///spl square/ without degrading the programming, erasing, and retention characteristics. Both Ti silicidation and device size reduction have been combined to achieve the fast access time of 100 ns.
Keywords
Field effect integrated circuits; Integrated circuit technology; Integrated memory circuits; PROM; Titanium compounds; VLSI; Circuits; Degradation; Delay lines; EPROM; Large scale integration; MOSFETs; Microcomputers; Nonvolatile memory; Silicidation; Silicides;
fLanguage
English
Journal_Title
Solid-State Circuits, IEEE Journal of
Publisher
ieee
ISSN
0018-9200
Type
jour
DOI
10.1109/JSSC.1985.1052323
Filename
1052323
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