Title :
High-performance 0.10- mu m CMOS devices operating at room temperature
Author :
Iwase, Masao ; Mizuno, Tomohisa ; Takahashi, Minoru ; Niiyama, Hiromi ; Fukumoto, Masato ; Ishida, Katsuhiro ; Inaba, Satoshi ; Takigami, Yuji ; Sanda, Atsuo ; Toriumi, Akira ; Yoshimi, Makoto
Author_Institution :
Toshiba Corp., Kawasaki, Japan
Abstract :
The authors have fabricated 0.10- mu m gate-length CMOS devices that operate with high speed at room temperature. Electron-beam lithography was used to define 0.10- mu m polysilicon gate patterns. Surface-channel type p- and n-channel MOSFETs were fabricated using an LDD structure combined with a self-aligned TiSi/sub 2/ process. Channel doping was optimized so as to suppress punchthrough as well as to realize high transconductance and low drain junction capacitance. The fabricated 0.10- mu m CMOS devices have exhibited high transconductance as well as a well-suppressed band-to-band tunneling current, although the short-channel effect occurred somewhat. The operation of a 0.10- mu m gate-length CMOS ring oscillator has been demonstrated. The operation speed was 27.7 ps/gate for 2.5 V at room temperature, which is the fastest CMOS switching ever reported.<>
Keywords :
CMOS integrated circuits; electron beam lithography; elemental semiconductors; insulated gate field effect transistors; ion implantation; metallisation; silicon; sputter etching; 0.10 micron; 27.7 ps; 300 K; CMOS devices; CMOS ring oscillator; LDD structure; MOSFETs; RIE; Si; electron beam lithography; high speed; high transconductance; ion implantation; low drain junction capacitance; n-channel; optimised channel doping; p-channel; polysilicon gate patterns; room temperature; self aligned TiSi/sub 2/ process; short-channel effect; CMOS technology; Capacitance; Doping; Fabrication; Impurities; Large scale integration; Lithography; Silicon; Temperature; Tunneling;
Journal_Title :
Electron Device Letters, IEEE
