Title :
Feature - Power-aware design techniques for nanometer MOS current-mode logic gates: a design framework
Author :
Alioto, Massimo ; Palumbo, Gaetano
Keywords :
CMOS logic circuits; Capacitance; Circuit topology; Inverters; Logic circuits; Logic design; Logic gates; MOS devices; Network topology; Resistors;
Journal_Title :
Circuits and Systems Magazine, IEEE
DOI :
10.1109/MCAS.2006.264841
