DocumentCode
899284
Title
A high-speed GaAs 1K static random access memory
Author
O´Conner, P. ; Flahive, P.G. ; Roman, B.J.
Volume
20
Issue
5
fYear
1985
Firstpage
1080
Lastpage
1082
Abstract
A high-performance 1024/spl times/1-bit static random access memory has been designed and fabricated using an epitaxial GaAs direct coupled logic process. Design rules include 4-/spl mu/m interconnect metallization lines and spaces with 2/spl times/4-/spl mu/m/SUP 2/ vias. MESFETS have 1-/spl mu/m gate length and a self-aligned source and drain. A minimum address access time of 1.7 ns has been observed.
Keywords
Field effect integrated circuits; Gallium arsenide; III-V semiconductors; Integrated memory circuits; Random-access storage; field effect integrated circuits; gallium arsenide; integrated memory circuits; random-access storage; Decoding; FETs; Fabrication; Gallium arsenide; Integrated circuit interconnections; Logic design; Random access memory; Read-write memory; SRAM chips; Threshold voltage;
fLanguage
English
Journal_Title
Solid-State Circuits, IEEE Journal of
Publisher
ieee
ISSN
0018-9200
Type
jour
DOI
10.1109/JSSC.1985.1052440
Filename
1052440
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