Latched domino CMOS logic

A new gate configuration, the latched domino (Ldomino) CMOS gate, is presented. It can be used to alleviate the inversion problem inherent in domino CMOS, while improving speed and reducing layout area. Ldomino logic can serve as an efficient interface stage between blocks of static and domino or differential-cascode voltage-switch logic. The function of interfacing single-ended logic signals to differential domino-compatible logic signals is combined with the capability of efficient implementation of complex logic functions, thereby improving the logic flexibility of domino logic. A simple 4-bit ALU is used as an illustrative example of the application of Ldomino logic.