Title :
A digital processor for decoding composite TV signals using adaptive filtering
Author :
Murakami, Kenji ; Nakagawa, Shin-ichi ; Yoshimoto, Masahiko ; Asai, Sotoju ; Akasaka, Yoichi ; Nakajima, Yoshimitsu ; Horiba, Yasutaka
fDate :
10/1/1986 12:00:00 AM
Abstract :
A CMOS pipelined video signal processor for use in digital NTSC/PAL color TV equipment, fabricated in a 2.0-μm double-layer poly-Si CMOS technology, is discussed. A picture quality enhancement is achieved by using newly developed filter functions which include an intrafield adaptive separation of composite signals into the luminance, Y, and chrominance, C, spectra, and an adaptive contour compensation. Also integrated are the Y-signal-processing functions, e.g., the contrast setting, the black level correction, and the delay compensation. The device contains 88000 transistors and operates with a lower power of 450 mW at a system clock of 14.3(NTSC)/17.7(PAL) MHz, which is equal to four times the color subcarrier frequency. The chip dimensions are 8.12×6.45 mm/SUP 2/. The design goal was achieved through the development of a cost-effective system algorithm, CMOS pipelined logics, and an on-chip two-line-delay storage.
Keywords :
CMOS integrated circuits; Computerised signal processing; Decoding; Digital filters; Microprocessor chips; Pipeline processing; Television equipment; Video signals; computerised signal processing; decoding; digital filters; microprocessor chips; pipeline processing; television equipment; video signals; Adaptive filters; CMOS process; CMOS technology; Clocks; Color; Decoding; Delay; Frequency; Signal processing; TV equipment;
Journal_Title :
Solid-State Circuits, IEEE Journal of
DOI :
10.1109/JSSC.1986.1052608