DocumentCode
901179
Title
CMOS/bipolar circuits for 60-MHz digital processing
Author
Hotta, Takashi ; Masuda, Ikuro ; Maejima, Hideo ; Ueno, Masahiro ; Iwamura, Masahiro ; Kurita, Kouzaburou ; Hotta, Atsuo
Volume
21
Issue
5
fYear
1986
fDate
10/1/1986 12:00:00 AM
Firstpage
808
Lastpage
813
Abstract
High-performance bipolar/CMOS (Hi-BiCMOS) technology, in which a bipolar transistor of 4-GHz cutoff frequency is combined with standard CMOS devices on the same chip, has been applied to a processor. The design strategy was to provide high integration density using the CMOS circuit and accelerate the critical paths using the Hi-BiCMOS circuits. Hi-BiCMOS circuits with low-voltage swing have been developed and applied to a 32-bit arithmetic logic unit and a 128-kb ROM with bipolar drivers to drive a heavy load capacitance. A 17-ns 32-bit carry propagation delay time and a 17-ns ROM access cycle time have been achieved using 2-μm Hi-BiCMOS technology. A minicomputer CPU with a 60-MHz machine cycle can be implemented with these circuits.
Keywords
Digital integrated circuits; Integrated logic circuits; Integrated memory circuits; Monolithic integrated circuits; Read-only storage; VLSI; digital integrated circuits; integrated logic circuits; integrated memory circuits; monolithic integrated circuits; read-only storage; Acceleration; Arithmetic; Bipolar transistors; CMOS digital integrated circuits; CMOS logic circuits; CMOS process; CMOS technology; Cutoff frequency; Process design; Read only memory;
fLanguage
English
Journal_Title
Solid-State Circuits, IEEE Journal of
Publisher
ieee
ISSN
0018-9200
Type
jour
DOI
10.1109/JSSC.1986.1052611
Filename
1052611
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