DocumentCode
901474
Title
An 8-bit 250 megasample per second analog-to-digital converter: operation without a sample and hold
Author
Peetz, Bruce ; Hamilton, Brian D. ; Kang, James
Volume
21
Issue
6
fYear
1986
fDate
12/1/1986 12:00:00 AM
Firstpage
997
Lastpage
1002
Abstract
A monolithic, 8-bit, 250 megasample per second analog-to-digital converter (ADC) fabricated in an oxide-isolated bipolar process is described. The use of a flash ADC architecture at high speeds without a sample and hold leads to a number of error sources. The design of the converter is optimized to minimize the effects of these error sources. Experimental results are presented and compared with theory.
Keywords
Analogue-digital conversion; Bipolar integrated circuits; analogue-digital conversion; bipolar integrated circuits; Analog-digital conversion; Circuits; Decoding; Design optimization; Encoding; Latches; Logic; Propagation delay; Sampling methods; Voltage;
fLanguage
English
Journal_Title
Solid-State Circuits, IEEE Journal of
Publisher
ieee
ISSN
0018-9200
Type
jour
DOI
10.1109/JSSC.1986.1052641
Filename
1052641
Link To Document